The present invention is directed to analog-to-digital conversion devices, and especially to sigma delta (xcexa3xcex94) modulator devices that can be used for analog-to-digital conversion operations.
Recent advances in communication technology have generated interest in performing analog-to-digital signal conversion earlier in the receiver channel than has been effected heretofore. Early analog-to-digital (A/D) conversion at either an intermediate frequency (IF) or radio frequency (RF) stage permits more programmability and simplifies the implementation of multi-standard systems. Such multi-standard systems are more and more in demand of late. In modern communication systems, usually both in-phase and quadrature signals (I/Q signals) exist in a given signal band. A conventional communication channel converts the band-pass signal into two low-pass I/Q channels before A/D conversion. Mismatches between the various analog channels can degrade system performance. A/D conversion at IF permits a more robust digital I/Q separation. Early conversion also serves to relax analog filter design requirements and eliminate some expensive external components.
Several constructions are known for band-pass xcexa3xcex94 modulators. One approach is to obtain a transfer function either by transforming a low-pass prototype or by generalized filter approximation. One can then implement the resulting transfer function using appropriate circuit technology, such as by using a switched capacitor circuit. There are two significant drawbacks to such a straightforward design configuration. First, such a design requires accurate circuit components so that the design will strongly depend upon accurate, generally more expensive components. It is quite difficult to design a high-resolution band pass xcexa3xcex94 modulator with technology currently available. A second drawback is related to the fact that signal bandwidth is getting higher and higher in products encountered in today""s marketplace. Thus, any circuit that is to be used in today""s market should be capable of operating at very high frequencies in order to obtain an acceptable oversampling ratio.
Another known design approach to band-pass xcexa3xcex94 modulators involves a time-interleaved multi-path approach. Since n-path architecture effectively performs a transformation of zxe2x88x921xe2x86x92zxe2x88x92n to a transfer function, if each path implements a low pass or a high pass xcexa3xcex94 modulation, the resulting system can be a band pass system. In such manner techniques used for stable and linear low pass or high pass xcexa3xcex94 modulator design can be used in a band pass xcexa3xcex94 modulator. Most such designs do not require highly accurate circuit components.
Multi-path xcexa3xcex94 systems provide a further advantage in that each path only needs to operate at a fraction of the effective sampling frequency. This enables the practical design of a xcexa3xcex94 modulator for a contemporary communication system that could have an intermediate frequency (IF) of 70 MHz-400 MHz. In addition, since power of an operational amplifier is proportional to the square of the operation speed n-path architecture can conserve power to a significant degree.
Some applications, such as third generation mobile telephone applications, use channels requiring large bandwidth. Moreover, the base station architectures in such systems use high intermediate frequencies to permit flexibility in the effecting of digital signal processing. For these reasons it is desirable to use analog-to-digital converters with very large bandwidth (e.g., up to the intermediate frequency used in such systemsxe2x80x94around 800-100 MHz) and having high resolution. In the alternative it is possible to use band pass data converters and exploit the oversampling permitted by the ratio between the intermediate frequency and the signal band. However, since the base stations in such systems require converting some third generation channels, the signal band is on the order of 5 MHz, so oversampling is limited to relatively small values.
The use of high speed bipolar technologies allows a designer to achieve high-resolution Nyquist-rate analog-to-digital conversion, typically used in pipeline architectures, with a high sampling rate (typically about 100 MHz or more) and good linearity. However, achieving high linearity across the entire Nyquist band is a significant design challenge and normally requires expensive on-chip trimming or complex calibration operations.
Using band-pass xcexa3xcex94 modulators for performing analog-to-digital conversion of intermediate frequency (IF) signals has advantages with respect to Nyquist rate architectures of the sort discussed above. For example, it is possible to use CMOS (complementary metal oxide silicon) technologies in fabricating components for use in such applications. It is possible to integrate the modulator with complex digital circuitry using CMOS devices. Further, a resulting analog to digital converter (ADC) could be much less expensive using CMOS devices than using bipolar components.
Some types of switched capacitor band pass xcexa3xcex94 modulators have limitations that render them unsuitable for meeting high IF and high resolution requirements. Some examples of such modulators are described in (1) xe2x80x9cSwitched-Capacitor Bandpass Delta-Sigma A/D Modulation at 10.7 MHzxe2x80x9d, by Frank W. Singor and W. Martin Snelgrove; IEEE Journal of Solid-State Circuits; Vol. 30, No. 3; March 1995; pp. 184-192; (2) xe2x80x9cA 40 MHz IF Fourth-Order Double-Sampled SC Bandpass xcexa3xcex94 Modulatorxe2x80x9d, by Seyfi Bazarjani and Martin Snelgrove; 1997 IEEE International Symposium on Circuits and Systems; Jun. 9-12, 1997, Hong Kong; pp. 73-76; (3) xe2x80x9cA Fourth Order Bandpass Delta-Sigma Modulator with Reduced Number of Op Ampsxe2x80x9d, by Bang-Sup Song; IEEE Journal of Solid-State Circuits; Vol, 30, No. 12; December 1995; pp. 1309-1315; (4) xe2x80x9cA Two-Path Bandpass xcexa3xcex94 Modulator for Digital IF Extraction at 20 MHzxe2x80x9d, by Adrian K. Ong and Bruce A. Wooley; IEEE Journal of Solid-State Circuits; Vol. 32, No. 12; December 1997; pp. 1920-1934; (5) xe2x80x9cAn 81-MHz IF Receiver in CMOSxe2x80x9d, by Armond Hairapetian; IEEE Journal of Solid-State Circuits; Vol. 31, No. 12; December 1996; pp. 1981-1986; (6) xe2x80x9cA 30 mW Pseudo-N-Path Sigma-Delta Band-Pass Modulatorxe2x80x9d, by Fabrizio Francesconi, Giuseppe Caiulo, Valentino Liberali and Franco Maloberti; 1996 IEEE Symposium on VLSI Circuits Digest of Technical Papers; pp. 60-61; and (7) xe2x80x9cA 13.5 mW, 185 MSample/s xcexa3xcex94-Modulator for UMTS/GSM Dual-Standard IF Receptionxe2x80x9d, by Thomas Burger and Qiuting Huang; 2001 IEEE International Solid-State Circuits Conference/Session 3. The representative xcexa3xcex94 modulators described in the above references require a clock frequency significantly higher than the intermediate frequency (IF) or path mismatches within the modulator apparatus produce tones in the band-pass.
Typically, for a 2-path modulator, tones are generated about zero,             f      s        4    ,            f      s        2    ,            3      ⁢              f        s              4    ,
and fs, where fs is the sampling frequency. It is desirable to situate the center frequency fo at a frequency where the quanitization noise power of the apparatus is at a minimum value, without encountering tones that are generated by path mismatches.
There is a need for an analog-to-digital apparatus that can achieve the above described desirable features: establish the center frequency at an appropriate Nyquist level where quantization noise power is at a minimum while avoiding mismatch generated tones. The apparatus of the present invention achieves both of the desirable features recited above using a novel cross-coupled architecture employing two xcexa3xcex94 modulators.
An apparatus for generating at least one digital signal representative of an analog input signal includes: (a) a first signal conversion device that includes a first analog signal treatment section coupled with a first input locus and a first digital signal treatment section coupled between the first analog signal treatment section and a first output locus;
the first signal conversion device receives a first sampled analog signal derived from the analog input signal at the first input locus; (b) a second signal conversion device that includes a second analog signal treatment section coupled with a second input locus and a second digital signal treatment section coupled between the second analog signal treatment section and a second output locus; the second signal conversion device receives a second sampled analog signal derived from the analog input signal at the second input locus; the first sampled analog signal and the second sampled analog signal are phase-offset by a first phase difference; (c) a first feedback device coupled between the first output locus and the second analog treatment section; the first feedback device asserts a first delay to first feedback signals conveyed from the first output locus to the second analog treatment section; and (d) a second feedback device coupled between the second output locus and the first analog treatment section; the second feedback device asserts a second delay to second feedback signals conveyed from the second output locus to the first analog treatment section; the first delay and the second delay are phase-offset by a second phase difference. The first phase difference and the second phase difference cooperate to affect power density spectrum of a resultant digital output signal at at least one predetermined frequency. The resultant digital output signal is derived from a summing of a first digital output signal presented by the first signal conversion device at the first output locus and a second digital output signal presented by the second signal conversion device at the second output locus.
It is, therefore, an object of the present invention to provide an apparatus for generating at least one digital signal representative of an analog input signal that permits establishing a center frequency at an appropriate Nyquist level where quantization noise power is at a minimum while avoiding mismatch generated tones.